发明名称 Fast fourier transform calculating apparatus and fast fourier transform calculating method
摘要 Butterfly calculations of a cardinal number of four and butterfly calculations of a cardinal number of two are performed by using the same circuitry. When butterfly calculations of a cardinal number of two are performed, predetermined lines in the circuitry are removed by using selectors. Moreover, the multiplication factors of the signal lines which join predetermined complex multiplication circuits with predetermined complex addition circuits are changed from -j to -1, from -1 to 1, from -1 to 1, and from -j to -1. As a result, a pair of butterfly calculating circuit systems (A and B) are formed. On the other hand, when calculations of a cardinal number of four are performed, all the signal lines in the circuitry are connected, and the predetermined multiplication factors of the respective paths are set. As a consequence, a single butterfly calculating circuit system having a cardinal number of four is formed. <IMAGE>
申请公布号 AU6363998(A) 申请公布日期 1998.11.05
申请号 AU19980063639 申请日期 1998.04.28
申请人 SONY CORPORATION 发明人 YASUNARI KOZAKI;YASUNARI IKEDA
分类号 G06F17/14 主分类号 G06F17/14
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