| 摘要 |
PROBLEM TO BE SOLVED: To suppress the deterioration of transistors to be a minimum when a voltage level higher than operation voltage in LSI is outputted outside by providing an intermediate potential generation circuit controlling the gate voltage of the transistors in an output circuit and a level shift circuit. SOLUTION: In the intermediate potential generation circuit 2, the number of connections of Pch enhancement-type transistor (Pch transistors) 9-13 which are diode-connected is varied and the voltage VPM of an intermediate level degree between high voltage power source VDDH and a GND level is generated. Voltage VPM is applied to the gates of the Pch transistors 21, 23 and 31 of the level shift circuit 3 and the output circuit 4. Thus, gate with stand voltage can sufficiently be improved and the deterioration of the Pch transistors 20, 22 and 30 can be prevented by setting the gate voltage of the Pch transistors 20, 22 and 30 using the high voltage power source VDDH to be VPM+|the threshold VPM+|the there shift of the Pch transistor|of the Pch transistor|at the least.
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