发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To enhance the efficiency of a step-up voltage generation circuit by isolating a second well region formed on a first well region through a third well region and forming an MOSFET for transmitting a step-up voltage to a capacitor on the output side in the second well region thus isolated. SOLUTION: A step-up voltage circuit transmits a step-up voltage to a capacitor on the output side through an MOSFET M1. A second D well region is formed on a first p well region which is isolated through a third n well region and the MOSFET M1 is formed in the second well region pWELL thus isolated. According to the structure, level loss can be reduced by supplying a step-up voltage to the second well region pWELL corresponding to the back gate of the MOSFET M1 thereby preventing the threshold voltage from increasing due to substrate effect. |
申请公布号 |
JPH10294427(A) |
申请公布日期 |
1998.11.04 |
申请号 |
JP19970117565 |
申请日期 |
1997.04.21 |
申请人 |
HITACHI LTD;HITACHI CHIYOU LSI SYST:KK |
发明人 |
TANAKA HITOSHI;KINOSHITA YOSHITAKA;NISHIMOTO KENJI;EBIHARA TAKASHI |
分类号 |
H01L27/04;G11C11/407;H01L21/822;H01L21/8242;H01L27/108 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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