发明名称 Digital clock recovery
摘要 A clock recovery mechanism for an ATM receiver recovers a service (source) clock transmitted over an ATM network. The mechanism includes an input for receiving an SRTS from the ATM network, a local SRTS generator for locally generating an SRTS, a comparator for comparing a received SRTS and a locally generated SRTS and a recovered service clock generator responsive to an output of the comparator for generating the recovered service clock and for controlling the local SRTS generator. The locally generated SRTS is compared directly with the received SRTS. The local SRTS is generated using the same method as used to generate the transmitted SRTS, that is using the network clock fnx and a locally generated clock, at frequency fs. The difference between the locally generated SRTS and the received SRTS can be expressed directly in a number of fnx pulse clocks to be added or removed to the generated fs clock. Thus a service clock can be recovered at a receiver location using SRTSs by means of a digital technique. <IMAGE>
申请公布号 EP0876017(A1) 申请公布日期 1998.11.04
申请号 EP19970400993 申请日期 1997.05.02
申请人 LSI LOGIC CORPORATION 发明人 LAURET, REGIS
分类号 H04J3/06;H04L12/70;H04Q11/04 主分类号 H04J3/06
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