发明名称 |
Method and system for adjusting a clock signal within electronic circuitry |
摘要 |
A method and system are provided. A clock signal is input and output at first and second nodes of integrated circuitry. The first node is connected through a selected one of a plurality of metallization paths of the integrated circuitry to the second node. Each of the metallization paths is connectable between the first and second nodes for delaying the clock signal by a respective amount of time between the first and second nodes, so that the clock signal at the second node is always delayed relative to the first node by the respective amount of time of the selected metallization path.
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申请公布号 |
US5831459(A) |
申请公布日期 |
1998.11.03 |
申请号 |
US19970878453 |
申请日期 |
1997.06.18 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MCDONALD, THOMAS COLVIN |
分类号 |
G06F1/10;H03K5/14;(IPC1-7):H03K5/13 |
主分类号 |
G06F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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