发明名称 |
Variable rate viterbi decorder |
摘要 |
A variable rate Viterbi decoder comprising: a signal generating means for generating a control signal according to an input code rate and a sampling clock; a memory for storing punctured coded data; a memory control means in which a signal for recognizing valid data is inputted, and a read signal and a write signal are generated according to an input clock, the sampling clock, and the control signal from the signal generating means; a depuncturing means for depuncturing the punctured coded data from the memory according to the sampling clock and the control signal from the signal generating means; and a Viterbi decoding means for decoding the depunctured data from the depuncturing means according to the sampling clock and the control signal from the signal generating means.
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申请公布号 |
US5832001(A) |
申请公布日期 |
1998.11.03 |
申请号 |
US19970823043 |
申请日期 |
1997.03.21 |
申请人 |
DAEWOO ELECTRONICS CO., LTD. |
发明人 |
CHOI, YOUNG-BAE |
分类号 |
G06F11/10;H03M13/23;H03M13/35;H03M13/41;H04L1/00;H04L27/22;(IPC1-7):H03M13/12 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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