发明名称 Acknowledge triggered forwarding of external block data responses in a microprocessor
摘要 A computer system and method using an acknowledging triggered forwarding mechanism for managing the receipt of an external block data response from an external agent. The mechanism consists of an incoming buffer and control logic. The incoming buffer connects internal memory units, such as a load store unit (LSU), cache, and instruction fetch unit (IFU) to an external agent. An external block data response sent by the external agent is stored in an entry partition in the incoming buffer until the validity of the data can be verified. Control logic connects the incoming buffer and the external agent. An external agent sends an external completion response to the control logic to report the status of the data in the incoming buffer. The data in the incoming buffer is forwarded to the internal memory units only if the control logic receives an acknowledge response from the external agent. If the control logic receives a negative acknowledge or bus error from the external agent, the data is discarded and the error is forwarded to the internal memory units.
申请公布号 US5832306(A) 申请公布日期 1998.11.03
申请号 US19950544537 申请日期 1995.10.18
申请人 SILICON GRAPHICS, INC. 发明人 MARTIN, RANDAL GORDON
分类号 G06F11/07;G06F12/08;(IPC1-7):G06F13/00 主分类号 G06F11/07
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