| 摘要 |
In a preferred logic circuit embodiment (10), there is a precharge node (14) coupled to be precharged to a precharge voltage (VDD) during a precharge phase and operable to be discharged during an evaluate phase. The circuit also includes a conditional series discharge path (22, 24, and 16) connected to the precharge node and operable to couple the precharge node to a voltage different than the precharge voltage. The conditional series discharge path includes a low threshold voltage transistor (22 or 24) having a first threshold voltage, and a high threshold voltage transistor (16) having a second threshold voltage higher in magnitude than the first threshold voltage, wherein a voltage connected to a gate of the high threshold voltage transistor is disabling during the precharge phase.
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