发明名称 Raised silicided source/drain electrode formation with reduced substrate silicon consumption
摘要 A method is provided for forming silicided source/drain electrodes in active devices wherein the electrodes have very thin junction regions. In the process silicidation material is deposited on the wafer and rapid-thermal-annealed at a temperature and for a time calculated to produce metal-rich or silicon-deficient silicide on the electrodes. The metal-rich or silicon-deficient silicide is selectively formed on the semiconductor electrodes and not on oxide or other insulating surfaces. A selective etch removes the silicidation material which has not reacted with silicon, including metal overlying insulating surfaces. Then, after cleaning the silicide surfaces, a layer of silicon is deposited over the structure and a second rapid thermal anneal is performed at a higher temperature than the first rapid thermal anneal. In the second rapid thermal anneal additional silicon from the deposited silicon layer is incorporated into the silicide converting it from metal-rich or silicon-deficient silicide into the more stable disilicide phase silicide. Upon removal of any unconsumed silicide, the disilicide contacts are completed. The process can be controlled to produce ultra-thin junction depths of less than 500 ANGSTROM with overlying silicide contacts of up to 1000 ANGSTROM or more in thickness. The result is the formation of thermally stable silicide contacts which are self-aligned with the electrodes.
申请公布号 US5830775(A) 申请公布日期 1998.11.03
申请号 US19960756782 申请日期 1996.11.26
申请人 SHARP MICROELECTRONICS TECHNOLOGY, INC.;SHARP KABUSHIKI KAISHA 发明人 MAA, JER-SHEN;HSU, SHEN TENG
分类号 H01L21/28;H01L21/285;H01L21/336;(IPC1-7):H01L21/283;H01L21/335 主分类号 H01L21/28
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