发明名称 |
Vertical synchronizing signal stabilizing circuit, integrated circuit and television signal processing device |
摘要 |
In a vertical synchronizing signal stabilizing circuit, an integrated circuit and a television signal processing device, a vertical synchronizing signal of which period is stabilized can be output with a small number of elements and a simple constitution, without being influenced by the state of the television signal. On the basis of a first distinguish signal which indicates whether there is a separated signal separated from the television signal as the vertical synchronizing signal or not and of a second distinguish signal which indicates whether the period of the separated signal is the standard period or not, the plural states of the separated signal are discriminated, and the processing mode of the separated signal processing circuit is switched on the basis of the result of the discrimination to process the separated signal.
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申请公布号 |
US5831682(A) |
申请公布日期 |
1998.11.03 |
申请号 |
US19960701390 |
申请日期 |
1996.08.22 |
申请人 |
SONY CORPORATION |
发明人 |
IWASAKI, NOBUTAKA;NUMATA, HIROSHI |
分类号 |
H04N5/12;H04N5/08;(IPC1-7):H04N5/10 |
主分类号 |
H04N5/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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