发明名称 Phase detector for high speed clock recovery from random binary signals
摘要 An improved phase detector for detecting the difference between an information signal and a clock signal is provided. The information signal is divided into a plurality of N divided signals, the data rate of each divided signal being the data rate of the information signal divided by N. A plurality of N variable width difference pulse signals are generated each being responsive to the phase difference between a divided signal and the clock signal. One or more fixed width reference pulse signals having a width proportional to one-half clock period are also generated. A phase error signal is then provided in response to the N difference pulse signals and the one or more reference pulse signals. Preferably, N is equal to 2M, where M is a positive integer greater than or equal to one.
申请公布号 AU6817898(A) 申请公布日期 1998.10.30
申请号 AU19980068178 申请日期 1998.04.01
申请人 GENNUM CORPORATION 发明人 JOHN R. FRANCIS;ATUL GUPTA
分类号 H03K5/26;H03D13/00;H03L7/08;H03L7/085;H03L7/089;H03L7/091;H04L7/033 主分类号 H03K5/26
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