| 摘要 |
A compositing buffer having an adjustable size and configuration reduces complexity and size of a multimedia processor integrated circuit. The compositing buffer may be optimized for lower resolutions, thus reducing its overall size and complexity, while still providing support for higher resolutions which may be required to support a particular standard. A pixel mapping logic receives data indicating the number of lines per band and number of pixels per line, as well as color depth (or any two of these data) and correctly maps compositing RAM bank access requests to the correct pixel location. In a second embodiment of the present invention, the variable band size of the compositing buffer may allow for an external memory to be used for a compositing buffer, for example, a portion of the display memory (frame buffer). While such an embodiment may reduce overall bandwidth, the associated cost reduction may make such an apparatus appealing for low cost applications. Band size may be adjusted depending upon pixel resolution and depth. In a third embodiment of the present invention, band size may be varied within a frame depending upon the number of layers or the complexity of each image portion. Simple portions of an image, have few layers, may be rendered using wide bands, whereas complex areas may be rendered in narrower bands. |
