Integrierte Halbleiterschaltung vom Leiter-auf-Chip Typ zum vermeiden von Draht-Kurzschlüsse
摘要
The lead structure for a first power supply potential is formed by first and second power supply leads 35a and 35b and a first connecting conductor part 36a connected thereto, and the lead structure for a second power supply potential is formed by third and fourth power supply leads 35c and 35d and a second connecting conductor part 36b connected thereto. The first connecting conductor part 36a and the second connecting conductor part 36b are placed at the central part of a semiconductor chip with a predetermined spacing between them, a plurality of first signal leads 34a and first signal pads 32a which are respectively connected thereto are disposed in the area between the first connecting conductor part 36a and a first edge 41, and a plurality of second signal leads 34b and second signal pads which are respectively connected thereto are disposed in the area between the second connecting conductor part 36b and a second edge 42. <IMAGE>
申请公布号
DE69321168(D1)
申请公布日期
1998.10.29
申请号
DE1993621168
申请日期
1993.07.08
申请人
NEC CORP., TOKIO/TOKYO, JP
发明人
TAKEUCHI, YASUHITO, C/O NEC IC MICROCOMPUTER, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA, JP