发明名称 Shielded semiconductor package
摘要 A Plastic Ball Grid Array package of the Cavity Down type comprises a Faraday Cage to protect the semiconductor chip from external HF wave interferences. The lateral sides of the Faraday Cage are constituted by a row of solder balls 303 connected in a zig-zag way to plated through holes 301 along the four edges of a plastics substrate on which the chip is mounted. The top side of the Cage is the metal plate of the Cavity Down package electrically connected to the through holes, while the bottom side is formed by the ground plane of the main board connected to the solder balls.
申请公布号 GB2324649(A) 申请公布日期 1998.10.28
申请号 GB19970007679 申请日期 1997.04.16
申请人 * INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GIUSEPPE * VENDRAMIN
分类号 H05K9/00;H01L23/12;H01L23/498;H01L23/50;H01L23/552;H01L23/60;H05K1/18 主分类号 H05K9/00
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