发明名称 |
Method for inserting test points for full-and-partial-scan built-in self-testing |
摘要 |
Test points (20, 24) placed at selected nodes (16) within a circuit (10) based on a cost function that accounts for (a) the global improvement in testability and (b) the penalty in circuit performance associated with propagation delays attributable to such test points. By accounting for both the global impact on testability and circuit performance degradation, the cost function maximizes fault coverage while achieving nearly minimal impairment of circuit performance. |
申请公布号 |
US5828828(A) |
申请公布日期 |
1998.10.27 |
申请号 |
US19970939498 |
申请日期 |
1997.09.29 |
申请人 |
LUCENT TECHNOLOGIES INC. |
发明人 |
LIN, CHIH-JEN;CHENG, KWANG-TING |
分类号 |
G01R31/3185;(IPC1-7):G06F11/00 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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