摘要 |
In a frequency synthesizer, a phase detector receives an externally-generated reference clock signal of a constant frequency and a feedba ck signal to produce an error signal, which is output through a loop filter to a voltage-cont rolled oscillator (VCO). A direct digital synthesizer (DDS) receives the reference cloc k signal and externally-generated phase data to produce a DDS output signal whose frequency is precisely controlled by the phase data. The DDS output signal is applied as a carrier to a differential detector where it is modulated with the o utput of the VCO to produce a signal corresponding to the lower sideband of the modulated carrier. The output of the differential detector is output to the phas e detector as the feedback signal.
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