发明名称 FREQUENCY SYNTHESIS USING FREQUENCY CONTROLLED CARRIER MODULATED WITH PLL FEEDBACK SIGNAL
摘要 In a frequency synthesizer, a phase detector receives an externally-generated reference clock signal of a constant frequency and a feedba ck signal to produce an error signal, which is output through a loop filter to a voltage-cont rolled oscillator (VCO). A direct digital synthesizer (DDS) receives the reference cloc k signal and externally-generated phase data to produce a DDS output signal whose frequency is precisely controlled by the phase data. The DDS output signal is applied as a carrier to a differential detector where it is modulated with the o utput of the VCO to produce a signal corresponding to the lower sideband of the modulated carrier. The output of the differential detector is output to the phas e detector as the feedback signal.
申请公布号 CA2081400(C) 申请公布日期 1998.10.27
申请号 CA19922081400 申请日期 1992.10.26
申请人 NEC CORPORATION 发明人 ICHIHARA, MASAKI
分类号 H03L7/10;H03L7/18;H03L7/185;(IPC1-7):H03L7/16;H03J7/02 主分类号 H03L7/10
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