发明名称 Ultra low power pumped n-channel output buffer with self-bootstrap
摘要 An ultra-low power pumped n-channel transistor output buffer with self-bootstrapping includes an n-channel pullup transistor as the primary pullup device. A gate-to-source capacitance Cgs of the pullup transistor is used to self-bootstrap the input data signal. A pass n-channel transistor is connected between the input data signal, and the gate of the pullup transistor, and is biased on a gate terminal thereof by a charge pump having a voltage magnitude one device threshold higher than the device operating rail Vcc. The pass transistor, so biased, permits the input data signal, which may have a magnitude of Vcc, to charge Cgs. An over-voltage can be developed on the gate of the pullup transistor by the self-bootstrapping effect of Cgs. The pass transistor, in addition, so biased, prevents such over-voltage on the pullup transistors gate from being shorted to Vcc through a driving device. The output buffer also includes a p-channel transistor having source and drain terminals defining a channel that is connected between another pumped voltage rail, and the gate of the pullup transistor. This p-channel transistor is activated when the output on the pad is desired to be a logic one, and operates to replenish any charge lost on the bootstrap capacitance due to leakage on the gate of the pullup transistor, or from leakage on the drain of the pass transistor. A second capacitor, similar in size to the pass transistor capacitance, is connected between the gate of the pass transistor, and the gate of a pulldown n-channel transistor, and operates to equalize and reduce the effect of transition changes in the input data signal.
申请公布号 US5828262(A) 申请公布日期 1998.10.27
申请号 US19960723077 申请日期 1996.09.30
申请人 CYPRESS SEMICONDUCTOR CORP. 发明人 REES, DAVID B.
分类号 H03K17/16;(IPC1-7):H03K17/16 主分类号 H03K17/16
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