发明名称 Hybrid processor and method for executing incrementally upgraded software
摘要 Computer apparatus having a first processor that runs legacy software implemented using a first instruction set, and a second processor that runs new or updated software using a second instruction set. An operand memory is coupled to the first and second processors and stores shared operands in a native representation of the first instruction set. The second instruction set has an extended address space which is used to permit access by the new or updated software to the shared operands. To achieve this, the second processor has a software-implemented object request broker and a reference repository that contains information regarding the location and format of shared operands. When the new or updated software needs access to a shared operand in the operand memory, the nor or updated software invokes an object adapter for the type of operand being accessed, which in turn invokes the object request broker in order to obtain information from the reference repository, enabling the object adapter to locate and reformat the shared operand 24 as required by the new or updated application software. Methods that permit access to shared operands by the software that runs on both processors are also disclosed.
申请公布号 US5828897(A) 申请公布日期 1998.10.27
申请号 US19960769571 申请日期 1996.12.19
申请人 RAYTHEON COMPANY 发明人 KIRSCH, STEVEN A.;MELLEMA, DWIGHT J.
分类号 G06F9/318;G06F9/38;(IPC1-7):G06F9/34 主分类号 G06F9/318
代理机构 代理人
主权项
地址