| 摘要 |
A modular multiplication method and device is based on RSD arithmetic, partial product reduction techniques and precomputation techniques. During multiplication, redundant representation is adopted to carry out addition of two large numbers (512 bits or longer) without carry propagation. A multiplication based on variable radix multiplier coding is performed by coding yi into a radix-8 digit +E,cir y+EE j, except when +E,cir y+EE j=+/-3, in which case yi is coded into a radix-4 digit +E,cir y+EE j. This modular multiplication method is used for VLSI implementation of many public-key cryptosystems, such as RSA.
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