发明名称 DIVISION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To perform signed division without converting the negative value of a dividend and/or a divisor to a positive value by comparing the absolute values of a part of a partial remainder and the divisor, turning the quotient of the digit to '1' in the case that a part of the partial remainder is larger or in the case that both are equal and turning it to '0' in the case that it is smaller. SOLUTION: This circuit is provided with a first comparator 9 for comparing the signs of the dividend and the divisor, a comparator 10 for comparing whether or not the sign of the result of an arithmetic operation performed in an adder-subtractor 5 is the same as the sign of the partial remainder and a control circuit 11 for receiving the arithmetic result of the adder-subtractor 5, the discriminated results of discriminators 7 and 8 and the compared result of a second comparator 10, deciding the quotient and controlling the selection of a selector 6, etc. In the circuit, in the division process of a recovery type or a non-recovery type in a signed state, the absolute values of a part of the partial remainder and the divisor are compared. Then, the quotient of the digit is turned to '1' in the case that a part of the partial remainder is larger or in the case that both are equal and the quotient is turned to '0' in the case that it is smaller. Thus, division time is shortened.
申请公布号 JPH10283164(A) 申请公布日期 1998.10.23
申请号 JP19970088187 申请日期 1997.04.07
申请人 TOSHIBA CORP 发明人 YANO NAOYOSHI
分类号 G06F7/38;G06F7/52;G06F7/535;G06F7/537 主分类号 G06F7/38
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