| 摘要 |
PROBLEM TO BE SOLVED: To reduce a power consumption by stopping the oscillation of one oscillation circuit on standby and utilizing the intermediate output of a clock signal being generated by the other oscillation circuit as the clock signal for a system. SOLUTION: A clock signal for a system being oscillated by a second oscillation circuit 6a and one of intermediate output where the oscillation signal of a first oscillation circuit 1 is divided by a frequency-dividing circuit 3 are supplied to a selection circuit 12. On standby, a clock output control means 13 for a system outputs a STANDBY signal, controls the selection circuit 12, and selects a frequency-dividing output and at the same time the STANDBY signal stops the oscillation of the clock signal for the system of the second oscillation circuit 6a and supplies the frequency-dividing output to a DRM control means 14 as the clock signal for the system, thus supplying the clock signal to a logic circuit 8 from the second oscillation circuit 6a and the oscillation circuit 1 on normal operation and standby, respectively. Then, a RAM 11 is refreshed based on the clock signal. |
