发明名称 DATA PROCESSOR
摘要 <p>PROBLEM TO BE SOLVED: To access an external space wider than the external space decided by an address terminal without outputting dedicated selection signals to the outside from a microcomputer by deciding an external device to be accessed by the difference of the number of waits. SOLUTION: This processor is provided with an instruction decoder 1001 for decoding a fetched instruction code and an address generation circuit 1002 for generating the address of 24 bits, the 4 bits of the address outputted from the address generation circuit 1002 and CLK 107 are inputted to a number of wait selection circuit 103 and wait signals 108 are outputted. The number of wait selection circuit 103 selects the number of wait to be inserted to an external bus cycle by the value of higher 4 bits in the address of the 24 bits. An external storage device selection circuit 120 receives the external bus cycle and decides the external storage device to be accessed. That is, the external storage device to be accessed is decided by the difference of the number of wait of the external bus cycle.</p>
申请公布号 JPH10283257(A) 申请公布日期 1998.10.23
申请号 JP19970083696 申请日期 1997.04.02
申请人 NEC CORP 发明人 HIGASHIDE TOMOFUMI
分类号 G06F12/06;G06F15/78;(IPC1-7):G06F12/06 主分类号 G06F12/06
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