发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR TESTING MEMORY
摘要 <p>A test circuit composed of microprogram-controlled control and processing sections which form test patterns (address and data) of a memory in accordance with a prescribed algorithm and, at the same time, read out written data, and a data discriminating means which discriminates the read-out data and outputs discriminated results is provided on a semiconductor chip on which the memory is mounted.</p>
申请公布号 WO1998047152(P1) 申请公布日期 1998.10.22
申请号 JP1998001731 申请日期 1998.04.16
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