发明名称 Parallel computer apparatus and method for performing all-to-all communications among processing elements
摘要 A parallel computer and all-to-all communications method. A plurality of processors are connected in an n-dimensional torus network, to provide an optimum communication method and apparatus for completing all-to-all communications within a shortest possible time. In the parallel computer having an n-dimensional rectangular parallelopiped torus network having a1xa2x . . . xan processors, with the maximum value of a1, a2, . . . , an defined as amax, it comprises a phase control unit having a phase control table for storing information according to which destination processors are determined for each of the predetermined transmission phases of amax P/4 (where P indicates the total number of processors) for a one-directional inter-processor connection channel, and of amax P/8 for a two-directional inter-processor connection channel, and a message transmission unit for transmitting a message to a destination processor listed in the phase control table during the phase in which the present processor is a source processor according to the predetermined phase order.
申请公布号 US5826033(A) 申请公布日期 1998.10.20
申请号 US19920982579 申请日期 1992.11.27
申请人 FUJITSU LIMITED 发明人 HAYASHI, KENICHI;HORIE, TAKESHI
分类号 G06F15/173;G06F15/80;H04L12/56;(IPC1-7):H04L12/407 主分类号 G06F15/173
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