发明名称 Programming architecture for a programmable integrated circuit employing antifuses
摘要 The programmable interconnect structure of a field programmable gate array (see FIG. 4B) includes a plurality of wire segments extending in a first direction, the wire segments being collinear with respect to each other. An antifuse is disposed between each pair of adjacent wire segments so that the adjacent wire segments can be coupled together. Programming conductors for supplying a programming voltage onto selected wire segments extend in a second direction perpendicular to the first direction. The programming drivers for driving some of the programming conductors are disposed on one side (for example above) of the wire segments whereas the programming drivers for driving others of the programming conductors are disposed on the opposite side (for example below) of the wire segments. The pattern for programming drivers coupled to programming conductors alternates from one side of the wire segments to the other from column to column across the field programmable gate array.
申请公布号 US5825200(A) 申请公布日期 1998.10.20
申请号 US19970929655 申请日期 1997.09.17
申请人 QUICKLOGIC CORPORATION 发明人 KOLZE, PAIGE A.
分类号 H02H9/00;H03K17/22;H03K19/177;(IPC1-7):H03K19/177 主分类号 H02H9/00
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