Digital signal processor for executing multiple instruction words

摘要

A digital signal processor (10) includes a primary data bus (12), a primary instruction bus (14), a program control unit (16), an arithmetic unit (18), and a multiplier (20). Within the program control unit (16), multi-instruction words are issued from program memory (22) to the primary instruction bus (14). These multi-instruction words allow both logical and arithmetic instructions to be performed simultaneously. The arithmetic unit (18) includes a secondary data bus (44) which couples the arithmetic unit to the accumulator (34). The arithmetic unit (18) also includes a barrel shifter (48) having sign extension to reduce the number of operations required to shift data. The arithmetic logic unit (32) further includes complex arithmetic functions resulting in fewer operations per instruction and a multiplier (50) which is used for filtering operations in digital filtering and by the arithmetic unit (18).