发明名称 |
Method and apparatus for testing the data output system of a memory system |
摘要 |
A method and apparatus for testing or verifying proper operation of a data output system of a memory system are provided. A known data signal is applied to a bit line, independent of the memory cells of the memory system associated with the bit line. Expected outputs of the data output system are determined based upon the formation or configuration of the data output system and the known data signal. Following application of the known data signal to the bit line, actual outputs of the data output system are compared to the expected outputs to verify proper operation of the data output system.
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申请公布号 |
US5826006(A) |
申请公布日期 |
1998.10.20 |
申请号 |
US19960724572 |
申请日期 |
1996.09.30 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
SAITOH, TOSHIHARU |
分类号 |
G11C29/38;(IPC1-7):F06F11/227 |
主分类号 |
G11C29/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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