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发明名称
TRENCHED DMOS TRANSISTOR WITH BURIED LAYER FOR REDUCED ON-RESISTANCE AND RUGGEDNESS
摘要
申请公布号
EP0870322(A1)
申请公布日期
1998.10.14
申请号
EP19960927388
申请日期
1996.08.16
申请人
SILICONIX INCORPORATED
发明人
HSHIEH, FWU-IUAN;CHANG, MIKE, F.;CHING, LIH-YING;HIM, SZE;COOK, WILLIAM
分类号
H01L21/336;H01L29/08;H01L29/78;(IPC1-7):H01L21/027;H01L21/36
主分类号
H01L21/336
代理机构
代理人
主权项
地址
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