| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent the occurrence of wiring erroneously in a memory cell in which '1' is written when changing voltage of a channel is low. SOLUTION: A source line bias circuit 9 is connected to source lines of memory cell arrays 1A, 1B. After the source line bias circuit 9 pre-charges channel voltage of a memory cell more highly than power source voltage by supplying voltage being higher than power source voltage and lower than erasing voltage to a source line at the time of writing data, the circuit 9 boosts the voltage by capacity coupling with a control gate, thereby preventing erroneous writing in a memory cell to which '1' is written.</p> |
