发明名称 DYNAMIC RAM
摘要 PROBLEM TO BE SOLVED: To enable high density integration adopting a division word line system by making constitution including a main word line, a sub-word selecting line, a sub-word line, and a sub-word driving circuit with a prescribed layout. SOLUTION: This device is provided with plural sub-word lines sw1 which has divided length in the direction of extension of a main word line MWL and to which plural memory cells are connected in the direction of a bit line BL crossing with the MWL line. A sub-word selection line FX provided in parallel with the MWL line is extended on a sub-array SBARY, guided to plural SBARY arranged in the direction of extension of a word line, connected to lines corresponding to a first sub-word selection lines FX-1B, 3B, 5B, 7B, a second sub-word selection lines FX-0B, 2M, 4B, 6B extended so as to intersect orthogonally with the MWL are extended to a word line driving circuit SWD region of an adjacent sub-array, and selection operation and non-selection operation of the sub-word line SWL are performed by signals from the MWL and the FX line.
申请公布号 JPH10275468(A) 申请公布日期 1998.10.13
申请号 JP19970096651 申请日期 1997.03.31
申请人 HITACHI LTD;TEXAS INSTR JAPAN LTD 发明人 TAKAHASHI TSUTOMU;ARAI KOJI;TAKAHASHI YASUSHI;TANAKA ATSUYA;SUKEGAWA SHUNICHI;BESSHO SHINJI;TAIRA MASAYUKI
分类号 G11C11/407;G11C11/401;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/407
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