LOC semiconductor package

摘要

A semiconductor package is disclosed including a semiconductor chip having a plurality of bonding pads on its top surface; a plurality of inner leads located above the semiconductor chip and electrically connected to the bonding pads by wire; a plurality of outer leads extending from the respective inner leads; and at least one bus bar for power supply and ground formed to be lower than the inner leads above the semiconductor chip. A method of packaging a semiconductor device is disclosed including the steps of: providing a semiconductor chip having a plurality of bonding pads on its top surface; arranging a plurality of inner leads and a plurality of outer leads extending therefrom above the semiconductor chip; and arranging bus bars for power supply and ground to be lower than the inner leads above the semiconductor chip.