发明名称 |
Circuit for generating internal column address suitable for burst mode |
摘要 |
An internal column address generation circuit generates an internal column address by utilizing an asynchronous counter. The circuit includes a column address buffer for synchronizing an initially received external address with an external system clock to generate the internal column address, and for synchronizing a counting bit output signal received at an internal input node with the external system clock to generate the internal column address; and an asynchronous counter connected to an output node of the column address buffer, for generating the bit output signal having the same or opposite phase as/to a phase of the internal column address received from the column address buffer, in response to a carry generation state.
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申请公布号 |
US5822270(A) |
申请公布日期 |
1998.10.13 |
申请号 |
US19960769434 |
申请日期 |
1996.12.19 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK, CHUROO |
分类号 |
G11C11/408;G11C7/10;G11C11/407;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/408 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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