| 摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit such as an application-specific integrated circuit(ASIC) or the like equipped with a scan function capable of performing a sure scan operation irrespective of the route length of a scan path. SOLUTION: Test data TD which is given to a flip-flop(FF) 11 at a scan FF 10-1 through a scan path 1S is latched at the timing of a clock signal CK which is inverted by an inverter 12. The output signal S11 of the FF 11 is given to an FF 14 via a selector 13, it is latched in the FF 14 at the timing of the clock signal CK, and it is given to a later-stage scan FF 10-2 through a scan path 3S. In this manner, the timing of the change of the test data TD and the timing of the rise of the clock signal CK are deviated by 1/2 of a clock signal, and a sure scan operation can be performed without being affected by the route length of the scan path 1S or the like. |
