| 摘要 |
PROBLEM TO BE SOLVED: To ensure on/off of a current control MOS transistor(TR) in the standby state even when a low voltage is selected for a power supply voltage VDD by applying a voltage of <=0 V or higher than VDD to a gate of the current control MOS transistor(TR) in the standby state in a CMOS logic circuit. SOLUTION: A threshold level of TRs MP1, MN1, being components of a CMOS logic circuit CM is selected lower than a usual level. A threshold level of a current control P-channel MOS TR MP2 in the standby state is selected higher than a threshold level of the TRs MP1, Mn1 being components of the CMOS logic circuit CM. A level conversion circuit 10 applies on/off control to the P-channel MOS TR MP2 by providing an output of a low level that is a negative voltage and an output of a high level that is the same voltage VDD as that of a 1st power supply line P1 depending on high/low levels of a signal applied to a control input terminal SIG. |
