| 摘要 |
PROBLEM TO BE SOLVED: To enable the model change of enhance (improving performance), etc., in small number of days by inputting a synchronizing signal synchronizing with a basic clock to a clock synchronizing circuit, preparing a synchronizing clock based on this synchronizing signal and supplying for each function circuit so as to operate. SOLUTION: A basic clock circuit 1 supplies CLK 3-P to a bus conversion control circuit 4 converting a CPU bus to a private bus by way of the CPU clock of a CLK1-P signal and a synchronizing circuit 2 and supplies the private clock signal of CLK4-P for the respective 10 adaptor circuits of IOA-1 and IOA-2 operating under a private bus. In this case, as the function of the circuit 2, CLK2-P (66 MHz) obtained by frequency-dividing a CPU clock from the circuit 1 is inputted and the circuit 4 generates operable CLK3-P (33 MHz). Thereby, the function circuits of different frequencies can be connected. |
