| 摘要 |
PROBLEM TO BE SOLVED: To suppress mutual interference between plural PLL circuits and to reduce jitter with the limited number of power terminals by changing the timing of the input signals of respective PLL circuits in a semiconductor device having the plural PLL circuits or the timing of the output signals of the respective PLL circuits. SOLUTION: The input signal having a prescribed frequency is inputted from the terminal 100 to a phase conversion circuit 10. The phase conversion circuit 10 operates to shift the phase of the input signal by a delay element, and the signals having the different phases are outputted. The outputted signals become the inputs of the PLL circuits 11, 12, 13,... N1. The PLL circuit is constituted of a phase comparator, a charge pump, a low pass filter and the VCO. The mutual interference of the PLL circuits is reduced and jitter is suppressed by shifting phase comparison timing inputted to the plural PLL circuits. |
