| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain the current mode logic circuit in which a low voltage operation and a high speed operation are attained. SOLUTION: The circuit is provided with 1st and 2nd NMOS transistors(TRs) N1, N2, an input terminal IN connecting to a gate of the 1st NMOS TR N1 used to receive data, an input terminal REF connecting to a gate of the 2nd NMOS TR N2 used to receive a reference voltage, an output terminal OUT connecting to a drain of the 1st NMOS TR N1, and a constant current source I connecting to each source of the 1st and 2nd NMOS TRs N1, N2. The input terminal IN and the input terminal REF are connected to body terminals of the 1st and 2nd NMOS TRs N1, N2 and a body voltage of the 1st and 2nd NMOS TRs N1, N2 is controlled.</p> |
