发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To have a multi-layer interconnection structure forming an upper layer wirings on a substantially flat insulation layer surface by measuring the thickness of a layer insulation film having a planarizing function at close wiring regions and selecting the width of a lower layer dummy wiring below an upper layer isolated wiring corresponding to the measured thickness. SOLUTION: The manufacturing method comprises step S1 of obtaining the relation between the width of a lower layer dummy wiring and thickness of a layer insulation film having a planarizing function thereon, step S2 of forming the layer insulation film on first close wiring regions on a semiconductor substrate under specified condition and measuring its thickness, step S3 of determining the dummy wiring width W at isolated regions so that the thickness M1 of the layer insulation film is equal to that at the isolated regions, step S4 of forming a lower layer wiring at the first regions and lower layer dummy wiring of the width W at the second isolated regions where wirings are not close, and forming a layer insulation film 14 on the surface including the first and second regions and upper layer wirings 15, 16 thereon.
申请公布号 JPH10270445(A) 申请公布日期 1998.10.09
申请号 JP19970076167 申请日期 1997.03.27
申请人 YAMAHA CORP 发明人 YAMAHA TAKAHISA;HIRAIDE SEIJI
分类号 H01L21/3205;H01L21/768;H01L21/82;H01L23/52;H01L23/528;H01L27/02;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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