Level converter for IC application

摘要

The converter converts two input potentials into two output potentials via a pair of counter-clock paths (GZ,GZ'), each with a signal input and a signal output. The signal inputs of the counter-clock paths are coupled together and provide the level converter input (E), their outputs being cross-connected, providing the level converter outputs. Each counter-clock path may have a counter-clock input stage (G,G') with positive and negative transistors (P1,N1;P1',N1') connected in series and a further pair of transistors (P3,P5;P3',P5'), with an inverter (INV) between the circuit input and one of the counter-clock stages.