发明名称 |
Means for testing a gate oxide |
摘要 |
<p>The method of testing a DMOS power transistor (2) comprises the phases of: arranging a switch (4) between the low-voltage circuitry (3) and the gate terminal (G) of the DMOS power transistor (2); maintaining the switch (4) in an open condition; applying a stress voltage to the gate terminal (G); testing the functionality of the DMOS power transistor (2); and, if the test has a positive outcome, short-circuiting the switch (3) through zapping. <IMAGE></p> |
申请公布号 |
EP0869370(A1) |
申请公布日期 |
1998.10.07 |
申请号 |
EP19970830159 |
申请日期 |
1997.04.01 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
BERTOTTI, FRANCO;MURARI, BRUNO;NOVARINI, ENRICO |
分类号 |
G01R31/26;(IPC1-7):G01R31/00;H01L21/66;H01L27/02;G01R31/316 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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