发明名称 Bus-to-bus bridge
摘要 <p>To improve the efficiency of delayed transactions in bus-to-bus bridge systems which include at least one interface to a PCI bus, a bridge system is disclosed including at least a primary interface and an interface to a secondary subsystem for interconnecting a primary PCI bus system and the secondary subsystem. The system comprises a delayed transaction mechanism for enabling a transaction source attached to the primary PCI bus system to effect delayed transactions with a target in the secondary subsystem. This system has a programmable delay transaction timer which provides a degree of flexibility in the configuration of PCI systems. This flexibility can be exploited to provide considerable efficiency gains, albeit at the expense of some deviation of the strict requirements of the PCI Specification. &lt;IMAGE&gt;</p>
申请公布号 EP0869441(A2) 申请公布日期 1998.10.07
申请号 EP19970480095 申请日期 1997.12.19
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 PELED, YEHUDA;ADAR, ETAI;NADIR, OPHIR
分类号 G06F13/40;(IPC1-7):G06F13/40 主分类号 G06F13/40
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