Integrated circuit comprising a phase controlled loop

摘要

The phase control loop incorporates a divider (4) provided with an input connected to the oscillator (3) output and with an output for supplying a signal, the frequency of which is divided in relation to that of a signal applied at its input, and a phase comparator (1) provided with two inputs. One of the phase comparator inputs is intended to receive a reference signal (CKREF) and the other is connected to the divider (4) output. The phase comparator (1) is also provided with an output connected to the divider output and with an output connected to the oscillator regulating input. The resynchronisation module is a type D toggle.