发明名称 Time delay charge integration circuit
摘要 A charge integration circuit has first and second capacitors C21 n-1 , C21 n , and first and second reference voltage supplies V ref , V x . A first switch S21 n-1 controls integration of charge from a photo diode in the first capacitor C21 n-1 and selectively resets the first capacitor to the first reference voltage. A second switch S21 n selectively resets the second capacitor C21 n to the first reference voltage. A current mirror Q1 n-1 , Q2 n-1 effects discharge of the second capacitor C21 n by a quantity of charge equivalent to the charge integrated on the first capacitor C21 n-1 so as to effectively transfer charge therebetween at the end of an integration period.
申请公布号 GB2323736(A) 申请公布日期 1998.09.30
申请号 GB19980004120 申请日期 1998.02.27
申请人 * NORTHERN TELECOM LIMITED 发明人 ANDREW PAUL * LEFEVRE
分类号 G06G7/184;(IPC1-7):H04N3/15 主分类号 G06G7/184
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