发明名称 Semiconductor integrated circuit equipped with test circuit
摘要 An integrated circuit device equipped with a test circuit includes a plurality of input/output terminals, an input terminal, and an internal circuit for receiving input data via the plurality of input/output terminals and outputting output data. The test circuit permits data exchange among the input/output terminals, the input terminal and the internal circuit. The test circuit preferably operates in a normal mode to supply input data to the internal circuit through the input/output terminals, and supply output data from the internal circuit through the input/output terminals. The test circuit further operates in a test mode to supply test input data to the internal circuit through one of the input terminal and the input/output terminals. The test circuit further supplies test output data that is output from the internal circuit to one of the input terminal and the input/output terminals which differ from the test input data supplied terminal.
申请公布号 US5815511(A) 申请公布日期 1998.09.29
申请号 US19960728978 申请日期 1996.10.11
申请人 FUJITSU LIMITED 发明人 YAMAMOTO, YASUHIRO
分类号 G01R31/28;G01R31/317;G01R31/3185;G01R31/319;G11C11/401;G11C11/407;G11C29/00;G11C29/12;(IPC1-7):G01R31/28 主分类号 G01R31/28
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