发明名称 CIRCUIT SIMULATION PARALLEL METHOD AND MEDIUM RECORDING CIRCUIT SIMULATION PARALLEL PROGRAM
摘要 PROBLEM TO BE SOLVED: To shorten analysis time by dividing object circuits, proceeding simulation calculation, transmitting a calculation result through communication, seeking time data that is needed for simulation and independently and parallelly performing simulation. SOLUTION: A management processor 1 divides object circuits and allocates each object circuit C0 to C3 to each simulation processor 20 to 23 respectively. It confirms an incoming message from each simulation processor and when there are incoming messages, it receives all messages and decides a defined time with all simulations. It rearranges terminal information in each processor and sends time information to all the simulation processors when it sends it. It is decided whether all simulation is finished or not, when it is decided that all the simulation is finished, it finishes processing, and when it is discriminated that it is not finished, it confirms incoming messages.
申请公布号 JPH10260954(A) 申请公布日期 1998.09.29
申请号 JP19970066119 申请日期 1997.03.19
申请人 FUJITSU LTD 发明人 KITAURA TOMOYASU
分类号 G06F17/50;G06F17/00;G06F19/00;G06Q50/00;G06Q50/04 主分类号 G06F17/50
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