发明名称 SEMICONDUCTOR WAFER TEST METHOD
摘要 PROBLEM TO BE SOLVED: To continuously and automatically process even an irregular cut wafer similar to a regular wafer by performing the setting to a carrier, carrying through a loader and an unloader, and testing at a test section of a wafer, while holding by a planar auxiliary jig. SOLUTION: A plurality of wafers 1 are set, while being mounted one by one on an auxiliary jig 10, in a regular carrier 2 together with the auxiliary jig 10. The auxiliary jig 10 mounting the wafer 1 is then taken out sequentially one by one by means of a loader 3, e.g. a rubber belt, and mounted on a test stage 5 where it is subjected to image processing by means of an image processor 11. Subsequently, the test stage 5 which mounts the auxiliary jig 10 mounted with the wafer 1 is carried, by means of the loader 3, to a tester section 4 where wafer tests including measurements of brightness, forward voltage, reverse voltage, and the like, are performed using a light-emitting element 6 and a measuring piece 7. After ending the tests, the wafer 1 is carried out, together with the auxiliary jig 10 to a carrier 9 the carrying-out side by means of an unloader 8.
申请公布号 JPH10261676(A) 申请公布日期 1998.09.29
申请号 JP19970063616 申请日期 1997.03.17
申请人 SHARP CORP 发明人 UEDA SADAAKI
分类号 H01L21/66;H01L21/68;H01L21/683;H01L33/00 主分类号 H01L21/66
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