发明名称 ARITHMETIC PROCESSOR
摘要 PROBLEM TO BE SOLVED: To make an arithmetic processor possible to flexibly deal with any kind of failure patterns of plural arithmetic processors LSI with a redundant control in an arithmetic processor, on which plural arithmetic processors LSI of a redundant structure are mounted. SOLUTION: The input and output of arithmetic processors LSI 1301 to 1316 are switched and controlled respectively corresponding to a failure pattern by controlling a selector circuit 10 with arithmetic control LSI 11. With this, it is possible to flexibly deal with any type of failure patterns of the processors LSI 1301 to 1316, with redundant control.
申请公布号 JPH10260856(A) 申请公布日期 1998.09.29
申请号 JP19970067681 申请日期 1997.03.21
申请人 NEC ENG LTD 发明人 KAMIMURA TSUKASA
分类号 G06F11/20;G06F11/22;G06F15/16;G06F15/177 主分类号 G06F11/20
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