发明名称 Method of forming a DRAM stacked capacitor with a two step ladder storage node
摘要 The present invention provides a method of manufacturing a capacitor having a two step ladder cross sectional shape. The method begins by forming a first conformal layer and a first insulation layer over a substrate. A contact hole is opened through the first conformal layer and the first insulation layer. A first conductive layer and a first masking layer are formed over the first insulation layer and in the contact opening. Then, the first masking layer and the first conductive layer are patterned to form a first ridge over at least portions of the source region. A first dielectric layer composed of silicon oxide is then formed over the first conductive layer. The first dielectric layer is anisotropically etched to form spacers on the sidewalls of the ridge. The first conducive layer and the first masking layer are anisotropically etched using the spacers as an etch mask thereby forming the storage electrode having a two step ladder cross sectional shape from the remaining first polysilicon layer. The first masking layer, the spacers, and the first insulation layer are removed. A capacitor dielectric layer and a top plate electrode are formed over the storage electrode to form the capacitor. The storage electrode with the two step ladder cross sectional shape reduces the surface topology without reducing capacitance.
申请公布号 US5814526(A) 申请公布日期 1998.09.29
申请号 US19960665118 申请日期 1996.06.14
申请人 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION 发明人 TSENG, HORNG-HUEI
分类号 H01L21/8242;(IPC1-7):H01L21/824 主分类号 H01L21/8242
代理机构 代理人
主权项
地址