发明名称 Multiple writes per a single erase for a nonvolatile memory
摘要 A method for performing multiple writes before an erase to a nonvolatile memory cell is described. A first bit is stored at a first level of a nonvolatile memory cell. A second bit is stored at a second level of the nonvolatile memory cell. A method of erasing a nonvolatile memory cell is described. A level indicator that indicates the next level of the nonvolatile memory cell to write to is incremented. A method of reading a nonvolatile memory cell includes recalling a level indicator. The nonvolatile memory cell is then sensed at a level indicated by the level indicator to determine the state of the memory cell.
申请公布号 US5815434(A) 申请公布日期 1998.09.29
申请号 US19950537132 申请日期 1995.09.29
申请人 INTEL CORPORATION 发明人 HASBUN, ROBERT N.;JANECEK, FRANK P.
分类号 G11C11/56;G11C16/10;G11C16/16;(IPC1-7):G11C11/34 主分类号 G11C11/56
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