发明名称 |
Apparatus and method for reducing power consumption in microprocessors through selective gating of clock signals |
摘要 |
A circuit to reduce the power consumption of a microprocessor includes activity monitor circuitry to generate an activity signal in response to a low activity operational state of the microprocessor. A clock controller connected to the activity monitor circuitry produces a periodic clock gating signal from the activity signal. Clock gating circuits intermittently apply the internal clock signal to the microprocessor logic circuitry in response to the periodic clock gating signal.
|
申请公布号 |
US5815725(A) |
申请公布日期 |
1998.09.29 |
申请号 |
US19960627078 |
申请日期 |
1996.04.03 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
FEIERBACH, GARY F. |
分类号 |
G06F1/04;G06F1/32;(IPC1-7):G06F1/00 |
主分类号 |
G06F1/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|